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My PDP8 contained 2 original 4K memory modules, 2 8K Plessey memory modules and 1 custom-made 8K MOS memory. Thus my PDP8 contained a full 32K memory implementation.

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DEC 4K MM8E memory
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Plessey 8K memory

An extract of the Maintenance Manual is attached that describes the 4K core memory.

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KM8-E Memory extension
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PDP-8/A KM8-A Option board

Also included are the engineering drawings of the KM8-E.

For completeness I have also added the corresponding hardware for the PDP-8/A. This board has some extra features that will be discussed in later section. Also included are its engineering drawings KM8-A.

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Multi8 MMU extension

As can be seen on the picture of the MMU that it is a pre-production module (DMM-8E2) of the Multi8 Memory Management Unit. The KM8-E module was adapted to this module, as can be seen by the wires on the module. The emulator was implemented with the production type (DMM-8E4). The engineering drawings of this module are not available.

This Multi8 MMU consists of one quad Omnibus module. It replaces the normal memory extension control,implementing two new functions, selective trapping of IOT's and field relocation. Selective trapping (or untrapping) provides the capability to select by software which IOT's should be trapped if executed in User Mode and which not. So software may (by loading certain registers in the MMU) specify that eg. the CDF/CIF 30 instructions are not to be trapped. This makes it possible to dynamically control the access of user programs to various memory fields. Thus, CDF/CIF instructions that are untrapped, and RDF and RIF, are executed by the hardware, without the (large) emulation overhead. This means that the larger part of the emulation overhead normally experienced in foreground/background operation is eliminated.

The selective trapping function would be of little use without the second function of the MMU; field relocation. The MMU contains a 8x3 bit relocation memory (RAM) that can be loaded by suitable IOT's. When the processor is in User Mode each memory reference by the processor is relocated by the MMU. Recall that the extended memory address for processor cycles is developed by the Memory Extension Control (either form the Intruction Field Register or from the Data Field Register). During relocation this (virtual or processor) extended memory address is used to select a word in the Relocation Register, giving the real or bus extended memory address. In this way a program running in usermode may be run in any set of fields just by loading the Relocation Register with the corresponding values.

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Page last modified on February 02, 2016, at 06:24 PM